Principal FPGA Lead - Electro-Mechanical Actuator

Application close date:

Applications will be accepted on an ongoing basis until the requisition is closed.

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! The role is part of the In-Space Systems business unit, which is focused on addressing two of the most compelling challenges in spaceflight today: space infrastructure and increasing mobility on-orbit.
** Technical Scope** - As a
** Principal-Level FPGA Developer**, you will lead the design, implementation, verification, and testing of our FPGA based solutions for satellite electro-mechanical actuation systems and other avionics. We are looking for someone to apply their technical expertise with dedicated commitment and detailed attention towards reliable and continuously operating electro-mechanical system control in deep space environments. The detailed design will host multiple processors, internal data buses and a mix of custom and reused IP blocks requiring systematic implementation, unit-and chip-level testing, design hardening for radiation and documentation to support third-party customer quality requirements.
** Required Experience & Leadership** - The lead shall have experience developing FPGA IP to meet performance, radiation robustness, and reliability for continuously operating electro-mechanical system control in deep space environments. The lead will mentor junior staff, generate working requirements from stakeholder reviews, and deliver quality solutions. Must be a self-starting engineering lead with strong ownership of the end-to-end FPGA solution.

An engineer skilled with DO-254 design assurance, human-space rated design, and ASIC development would be preferred.
** Special Mentions:
*** Relocation provided
* Travel expected up to 25% of the time
** Responsibilities include but are not limited to:
*** Generate FPGA requirements in coordination with systems engineering, hardware engineering, and software engineering
* Design, write HDL code, verify and document complex low-level modules
* Synthesize reliable radiation robust solutions that work for continuous operations in deep space environments
* Lead unit and chip-level testing for FPGA
* Drive innovation and leading-edge AI/ML based initiatives for the future of FPGA development in In-Space Systems
* Mentor junior engineers
*
* Minimum Qualifications:

*** Bachelor of Science in Electrical Engineering, Computer Engineering, or a related discipline.
* 10+ years of FPGA/ASIC design and verification work experience for radiation robust solutions operating in deep-space environment
* Proficient in writing FPGA level requirements
* Experience in writing RTL using Verilog, System Verilog, or VHDL
* Experience with Clock Domain Crossing, Error Correcting Codes, and safe state machines techniques and analysis
* Experience with FPGA development tools such as Xilinx Vivado, and Microchip Libero.
* Experience with FPGA Timing Constraint definition, STA, and timing closure.
* Proficient in testbench design and usage.
* Experience with Questa Sim or equivalent simulator
* Experience using FPGA Design and Verification tools in a Linux environment
* Working knowledge of DO-254, or other safety-critical standards
* Ability to influence others and communicate effectively
*
* Preferred Qualifications:

*** Master of Science in Electrical Engineering, Computer Engineering, or a related discipline.
* Experience with sophisticated verification techniques such as Universal Verification Methodology (UVM) and Constrained Random Verification.
* Experience with scripting languages, such as Python
* Experience with revision control systems, such as Git/SVN
* Experience with common on-chip bus protocols such as AMBA (AXI, AHB, APB)
* Experience leveraging AI/LLMs as a co-pilot### Compensation Range for:

CO applicants is $-$;

WA applicants is $-$
** Other site ranges may differ
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