Principal Early Supplier Involvement; ESI) Engineer - AI​/Hyperscale Hardware

Position Overview

We are seeking a Principal Early Supplier Involvement (ESI) Engineer to drive hardware co-design, manufacturability, and supply chain readiness for our next-generation Data Center AI Infrastructure platform. In this role, you will act as the technical bridge between our System Architects, Mechanical/Thermal/Electrical Engineering teams, and strategic technology suppliers. You will engage with partners early in the concept phase (Phase 0/1) to de-risk high-density thermal architectures, complex high-speed PCBAs, and high-power delivery systems.

Your goal is to ensure our AI computing systems achieve industry-leading time-to-market, uncompromised quality, and scalable cost-to-manufacture.

• AI Hardware Co-Design & Technical Integration Advanced Thermal & Liquid Cooling DFM:
  Partner with liquid cooling suppliers (CDUs, cold plates, quick disconnects/QDCs, manifolds) to review fluid dynamics, materials compatibility, leak-mitigation designs, and high-volume manufacturability.
• High-Speed PCBA & Custom Interconnects:
  Conduct early DFM/DFT reviews with EMS partners and substrate/PCB suppliers for complex AI accelerator boards, PCIe Gen 6/7, and optical interconnects (high layer-count PCBs, microvias, HDI).
• Power Delivery Systems:
  Collaborate with power supply and busbar manufacturers to optimize ultra-high-density power distribution units (PDUs), power shelves, and voltage regulator modules (VRMs) for 100kW+ rack architectures.
• Rack-Level Mechanical & Structural Integration:
  Work with chassis and rack-fabrication suppliers to ensure structural integrity, tolerance stack-up analysis (GD&T), and blind-mate blind-connector alignment.
• Prototyping, Ramp, & Risk Mitigation Rapid NPI Prototyping:
  Oversee prototype builds with primary suppliers to accelerate engineering validation test (EVT) and design validation test (DVT) cycles.
• Single/Sole-Source De-Risking:
  Identify single-point-of-failure components early in the CAD/schematic lifecycle and drive second-source qualifying pathways or modular redesigns.
• Should-Cost & Process Yield Modeling:
  Analyze early component geometry, material selection, and process flows (e.g., skived vs. stamped cold plates, high-frequency laminates) to build accurate cost models and maximize production yields.

• Education:
  
  Bachelor’s or Master’s degree in Mechanical Engineering, Electrical Engineering, Materials Science, or Manufacturing Engineering.
• Experience:
  
  4–8+ years in NPI engineering, hardware design, supplier technical development, or DFM for high-density compute, networking, or data center hardware.
• Technical Expertise:
  Hands-on experience with liquid cooling technologies (direct-to-chip, immersion, CDUs) or high-power/high-speed server architecture. Advanced knowledge of GD&T, CAD software (Creo, Solid Works, or Siemens NX), and tolerance stack-up analysis for server chasses and rack enclosures. Direct experience conducting DFM reviews with Tier-1 EMS, PCB fabricators, and custom mechanical/thermal vendors.
• Soft Skills:
  
  Ability to communicate effectively across cross-functional boundaries—translating high-level AI system requirements into actionable supplier specifications. Strong negotiation and technical decision-making skills in high-pressure, fast-paced environments.

• Deep understanding of high-frequency materials (e.g., Megtron 6/7/8) and high-density interconnect (HDI) manufacturing.
• Familiarity with Telcordia, OCP (Open Compute Project) standards, and NEBS compliance.
• Experience with automated should-cost tools (e.g., aPriori) and PLM systems (Agile, Windchill).

ZT Systems, a Sanmina Company, assesses market data to ensure a competitive compensation package is created…