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Layout Engineering Lead
Job in
Sherman, Grayson County, Texas, 75091, USA
Listed on 2026-10-11
Listing for:
Coherent Corp.
Full Time
position Listed on 2026-10-11
Job specializations:
-
Engineering
Electronics Engineer, Quality Engineering
Job Description & How to Apply Below
- Lead physical layout development for III-V semiconductor laser products including VCSELs, DFB lasers, photonic devices, and related optoelectronic technologies.
- Own layout architecture, mask design, and mask data preparation from concept through production release.
- Develop, maintain, and improve design rule methodologies, verification flows, and layout standards to ensure manufacturable and robust designs.
- Design and implement process monitor structures, test patterns, and characterization vehicles to support process development, process control, yield improvement, and reliability monitoring.
- Develop automated Design Rule Check (DRC), Layout Versus Schematic (LVS), verification, and data analysis solutions using scripting and programming languages such as Python, Tcl, Perl, or equivalent.
- Champion layout automation initiatives to improve design productivity, consistency, quality, and cycle time.
- Collaborate closely with process integration, device engineering, epitaxy, manufacturing, and product engineering teams to ensure layouts meet design, process, reliability, and manufacturing requirements.
- Drive layout reviews and cross-functional design reviews throughout product development and qualification phases.
- Support root cause investigations and failure analysis activities by evaluating potential layout-related issues and implementing corrective actions.
- Establish and maintain layout design guidelines, libraries, reusable cells, and best practices.
- Coordinate mask revisions and change management activities while ensuring configuration control and documentation accuracy.
- Lead multifunctional teams in resolving layout, manufacturability, and process integration challenges.
- Mentor layout engineering techs and provide technical guidance on layout methodologies, DRC compliance, automation, and semiconductor process interactions.
Duties & Responsibilities
- Lead physical layout development for III-V semiconductor laser products including VCSELs, DFB lasers, photonic devices, and related optoelectronic technologies.
- Own layout architecture, mask design, and mask data preparation from concept through production release.
- Develop, maintain, and improve design rule methodologies, verification flows, and layout standards to ensure manufacturable and robust designs.
- Design and implement process monitor structures, test patterns, and characterization vehicles to support process development, process control, yield improvement, and reliability monitoring.
- Develop automated Design Rule Check (DRC), Layout Versus Schematic (LVS), verification, and data analysis solutions using scripting and programming languages such as Python, Tcl, Perl, or equivalent.
- Champion layout automation initiatives to improve design productivity, consistency, quality, and cycle time.
- Collaborate closely with process integration, device engineering, epitaxy, manufacturing, and product engineering teams to ensure layouts meet design, process, reliability, and manufacturing requirements.
- Drive layout reviews and cross-functional design reviews throughout product development and qualification phases.
- Support root cause investigations and failure analysis activities by evaluating potential layout-related issues and implementing corrective actions.
- Establish and maintain layout design guidelines, libraries, reusable cells, and best practices.
- Coordinate mask revisions and change management activities while ensuring configuration control and documentation accuracy.
- Lead multifunctional teams in resolving layout, manufacturability, and process integration challenges.
- Mentor layout engineering techs and provide technical guidance on layout methodologies, DRC compliance, automation, and semiconductor process interactions.
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