IC Physical Design Engineer

• IC physical design of 12nm/6nm/4nm and below world leading advanced process chip, from RTL to GDS.
• Block owner, take block of 2~3 million instances, working on Synthesis/APR (auto place and route)/Signoff.
• Block coordinator role for more than 5~10 blocks, solving the critical issue and give the solution to block owners.
• TOP role for the complicated hierarchical chip (more than 20 million instances plus 500+ macros), doing floorplan and partition, responsible for full chip tapeout.

• Basic knowledge of electronic design or IC design, internship experience in related area is preferred.
• Basic knowledge of UNIX/LINUX env and capable of at least one of the following programming languages: C/C++, Python, TCL, Perl.
• Good communication and teamwork spirit, eager to learn new technologies and willing to take challenges.

PERSOL Singapore Pte Ltd - RCB No. E - EA License No. 01C4394

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