SoC Verification Engineer Brain-Interface ASIC

Neuralink seeks an ASIC Design Verification Engineer to join the SoC Implant Team. You will verify digital modules, build high-throughput, low-power DSP blocks, and develop robust test benches. The role emphasizes System Verilog expertise and verification flow automation within a world-class hardware environment.

You will collaborate across architecture, RTL, and physical design, contributing to a cutting-edge brain-machine interface platform with RSU equity and competitive compensation.

This role, SoC Verification Engineer for Brain-Interface ASIC at Neuro

TechX, could be your next opportunity.

The position is based in South San Francisco, CA, United States.

This opportunity is part of our work in Engineering.

The advertised compensation is 131..

We aim to respond to suitable candidates as soon as possible.

Full responsibilities and requirements are described in the listing above.

Learn more about the SoC Verification Engineer for Brain-Interface ASIC role in the description above.