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Design Verification Lead, Nitro Team

Job in Springfield, Sangamon County, Illinois, 62777, USA
Listing for: Amazon Web Services (AWS)
Full Time position
Listed on 2026-10-09
Job specializations:
  • Engineering
    Test Engineer, Hardware Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 140000 - 180000 USD Yearly USD 140000.00 180000.00 YEAR
Job Description & How to Apply Below
Description

Annapurna Labs is the team behind AWS Nitro, the purpose-built system that powers the security, performance, and innovation of every EC2 instance. We operate like a start-up with the scale of the world's largest cloud provider.

Description

Annapurna Labs is the team behind AWS Nitro, the purpose-built system that powers the security, performance, and innovation of every EC2 instance. We operate like a start-up with the scale of the world's largest cloud provider.

We’re looking for a Design Verification Team Lead - a design verification technical lead that is responsible for complex SoC sub-system, with cutting edge technology for Nitro system SoC, the foundation of AWS's virtualization, networking, and storage offload infrastructure.

It starts at product definition - we engage from day one, shaping requirements and translating product intent into verification strategies before a single line of RTL is written

It extends into software - we work side-by-side with SW teams, verifying hardware-software interfaces and ensuring seamless integration across the stack, with particular emphasis on networking workloads such as ENA and EFA

It reaches into physical design - we verify physical design aspects within functional verification, bridging the gap between logical correctness and silicon reality

It closes the loop - from spec to silicon, our verification touches every team and every stage of chip development

Key job responsibilities
  • Develop and execute verification plans for IO sub-systems - covering interconnect protocols, peripheral interfaces, and system-level integration with a strong connection to networking flows (ENA/EFA)
  • Verify IO sub-system features, including interconnect protocols and various accelerator engines
  • Develop and debug C embedded SW as part of hardware-software integration verification
  • Build and maintain UVM-based verification environments for various clusters and sub-systems
  • Verify ARM advanced interconnect protocols (AMBA CHI/ACE/AXI) ensuring correct coherency transactions, performance verification, and protocol compliance
  • Verify the IO virtualization SMMU/TLB operations, page table walks, translation granules, and memory attributes (cache-ability, share-ability)
  • Develop constrained-random and directed test strategies targeting corner cases in IO protocol hazards, coherency races, and system boundary conditions
  • Drive coverage closure using functional coverage models, assertion-based verification, and formal methods where applicable
  • Contribute to performance verification - ensuring micro-architectural implementations meet performance targets alongside correctness
A day in the life

As a Design Verification Team Lead on the Nitro team, you will be responsible for leading the verification of complex SoC sub-systems, driving industry-leading verification methodologies, and ensuring our next-generation Nitro system SoC meets the highest quality bar before reaching silicon.

About The Team

What Sets Us Apart?

Full system ownership - our verification leaders gain deep understanding of all system flows and the full SW stack, truly owning the technical scope from product definition through post-tapeout activities. This end-to-end ownership is what defines verification at Annapurna Labs

Agentic AI is embedded in our workflow - not as an experiment, but as a core part of how we design and verify chips

Cutting edge methodologies drive every stage of our verification process

Relentless innovation - we don’t settle; we actively seek new approaches that raise the bar on silicon quality

We do classic functional verification (SV/UVM/TLM), but beyond that, we touch physical design aspects, to ensure that the quality of our silicon is beyond logical functionality

Performance optimization at all…

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