Analog Design, Staff Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You are an experienced analog circuit designer at the forefront of semiconductor innovation, bringing over a decade of hands‑on expertise in high-speed Multi‑Gbps NRZ & PAM4 Ser Des IP and advanced process nodes such as FinFET and gate-all-around (GAA) technologies. You thrive on translating complex Ser Des standards into robust, high‑performance circuit architectures, adeptly navigating the intricate world of transistor‑level design, system‑level budgeting, and analog/digital co‑design.

You are proactive and analytical, with a keen ability to identify architectural bottlenecks and deliver innovative solutions that drive quality and reliability in silicon products. Your collaborative spirit enables you to bridge disciplines across analog, digital, and layout teams, fostering open communication and a culture of teamwork. As a technical leader and trusted mentor, you are passionate about sharing knowledge, advocating for design excellence, and nurturing the growth of those around you.

Continuous learning excites you—you stay ahead of industry trends and emerging technologies and value diversity and inclusion, recognizing that the best ideas come from a variety of perspectives. Detail‑oriented and highly adaptable, you consistently deliver impactful results, shaping the future of high‑speed connectivity and semiconductor technology. You are ready to make a lasting impact in a dynamic, innovative environment.

• Reviewing and interpreting Ser Des standards to define, develop, and refine innovative transceiver architectures and detailed analog sub‑block specifications for high‑speed Multi‑Gbps NRZ & PAM4 Ser Des IP.
• Investigating and architecting advanced circuit solutions that address performance bottlenecks, driving significant improvements in power, area, and speed while ensuring robust and reliable silicon performance.
• Collaborating closely with multidisciplinary teams—including analog, digital, and layout engineers—to streamline design and verification processes, foster open communication, and ensure optimal efficiency and quality throughout the development cycle.
• Overseeing and guiding physical layout efforts, with a strong focus on minimizing parasitics, device stress, and process variations to achieve high‑performance, manufacturable designs.
• Proposing and implementing comprehensive design and verification strategies using state‑of‑the‑art simulation tools, and presenting technical data, simulation results, and design justifications to internal teams and external stakeholders, including industry panels and customers.
• Documenting design features, test plans, and results with clarity and precision, supporting both internal knowledge sharing and external customer engagements.
• Consulting on electrical characterization, analyzing customer silicon data, and identifying opportunities for design enhancements and post‑silicon updates to continuously improve product quality and performance.
• Driving innovation and technical excellence in high‑speed Ser Des IP development, ensuring impactful contributions to next‑generation connectivity solutions.
• Providing support to the system team and developing and automating various tasks to enhance productivity and quality.

• Drive innovation in high‑speed analog and mixed‑signal design, enabling the development of next‑generation connectivity solutions for advanced computing, networking, and AI applications.
• Shape the architectural direction of Ser Des IP, influencing industry standards and future product offerings while advancing scalability, performance, and power efficiency across Synopsys’ silicon IP portfolio.
• Enhance product quality and reliability through meticulous design, verification, and documentation practices,…