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ASIC Design Verification Engineer, Machine Learning

Job in Sunnyvale, Santa Clara County, California, 94087, USA
Listing for: Google
Full Time position
Listed on 2026-01-01
Job specializations:
  • Engineering
    Systems Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 132000 - 189000 USD Yearly USD 132000.00 189000.00 YEAR
Job Description & How to Apply Below
ASIC Design Verification Engineer, Machine Learning

Join to apply for the ASIC Design Verification Engineer, Machine Learning role at Google.

About The Job

In this role, you’ll shape the future of AI/ML hardware acceleration by developing custom silicon solutions for Google's TPU (Tensor Processing Unit). You will drive cutting‑edge data to verify the architecture and integration within AI/ML systems.

Minimum Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

• 4 years of experience with design verification.

• Experience with System Verilog/Verilog.

Preferred Qualifications

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.

• 6 years of experience with silicon design verification.

• Experience contributing across the entire design and verification life cycle.

• Experience optimizing tools, flows, and methodologies to improve efficiency.

• Experience with scripting languages (e.g., Python or Perl).

• Excellent problem solving and communication skills.

Responsibilities

• Plan verification of complex digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.

• Create and enhance constrained‑random verification environments using System Verilog and UVM, or formally verify designs with SVA and industry‑leading formal tools.

• Identify and write all types of coverage measures for stimulus and corner cases.

• Debug tests with design engineers to deliver functionally correct design blocks.

• Close coverage measures to identify verification holes and to show progress towards tape‑out.

The U.S. base salary range for this full‑time position is $132,000–$189,000 + bonus + equity + benefits. Additional compensation details may vary by location.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity, or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law.

If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.

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