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Principal Verification Engineer - UVM AI Processor
Job in
Sunnyvale, Santa Clara County, California, 94087, USA
Listed on 2026-01-07
Listing for:
Thrive Recruitment Agency
Full Time
position Listed on 2026-01-07
Job specializations:
-
Engineering
Systems Engineer
Job Description & How to Apply Below
A leading recruitment firm is seeking a skilled Verification Design Engineer (Mid/Sr/Princ) in Sunnyvale, California. The role involves creating UVM testbench environments for a custom AI processor, ensuring proper functionality through developed infrastructure and collaboration with design teams. Candidates should possess at least 3 years of experience with UVM test benches, knowledge of System Verilog, and proficiency in Python. This position offers a dynamic environment focused on innovative architecture and verification methodologies.
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