Memory Silicon TPM Lead - Infra & NPI
Listed on 2026-10-07
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Engineering
Test Engineer, Hardware Engineer, Systems Engineer
Google's Silicon Development team is seeking a Technical Program Manager III to lead memory-related silicon programs across concept, architecture, design, validation and NPI, coordinating with SoC teams and external vendors.
You will plan requirements with internal customers, manage schedules, identify risks, and communicate trade-offs to executives and engineers while driving execution and metrics across the program lifecycle.
The Memory Silicon TPM Lead
- Infra & NPI role at Google Inc. is now open for applications in Sunnyvale, CA, United States.
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This posting is for the Memory Silicon TPM Lead
- Infra & NPI role at Google Inc., based in Sunnyvale, CA, United States.
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