Silicon Design Manager: RTL​/ML Accelerator Architect

Google is seeking a Silicon Design Manager to shape the future of AI/ML hardware acceleration and drive TPU architecture and integration. You will lead a team of RTL engineers, mentor performance-focused designers, and collaborate with cross-functional groups to deliver high‑quality TPU IP and compute cores.

You will work with architects to set timing goals, explore physical design trade-offs, and coordinate with software teams on clocking and power management, enabling scalable AI solutions

Consider building your career as a Silicon Design Manager: RTL/ML Accelerator Architect at Minority Professional Network, Inc.

This position is for the Silicon Design Manager: RTL/ML Accelerator Architect role at Minority Professional Network, Inc.

We are seeking a motivated Silicon Design Manager: RTL/ML Accelerator Architect to join Minority Professional Network, Inc. in Sunnyvale, CA, United States.

The Silicon Design Manager: RTL/ML Accelerator Architect position in the Engineering field is open for applications.