Low-Power ASIC Design Engineer SoC & IP
Listed on 2026-10-18
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Engineering
Hardware Engineer, Systems Engineer, Electronics Engineer, Test Engineer
Meta in Sunnyvale, CA seeks skilled Design Engineers to develop advanced hardware accelerators and ASIC IPs for ML, graphics, display, and network acceleration. You will work with top researchers to build low-power solutions and collaborate across DV, PD, and architecture teams.
The role emphasizes micro-architecture, RTL coding, and verification for complex IPs, with hands-on collaboration for design targets related to performance and power optimization.
The Low-Power ASIC Design Engineer for SoC & IP role at Anysilicon is now open for applications in Sunnyvale, CA, United States.
Are you ready to take on the Low-Power ASIC Design Engineer for SoC & IP role at Anysilicon?
We would love to welcome a new Low-Power ASIC Design Engineer for SoC & IP to our team in Sunnyvale, CA, United States.
For the Low-Power ASIC Design Engineer for SoC & IP position at Anysilicon, we are reviewing applications now.
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