TPU ASIC Verification Manager – AI/ML Hardware
Listed on 2026-10-21
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Engineering
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Management
Google Cloud in Sunnyvale, CA is seeking an experienced Share ASIC Design Verification Manager to lead the functional verification of TPU designs. You will shape verification strategy, guide a team across subchip, subsystem, and full-chip levels, and collaborate with front-end design, architecture, and performance groups to ensure correctness and performance.
You will develop test plans, write diagnostic code, and build monitors and checkers, driving coverage analysis and QA for high-impact
The TPU ASIC Verification Manager – AI/ML Hardware role at Google LLC is now open for applications in Sunnyvale, CA, United States.
We are looking to fill the TPU ASIC Verification Manager – AI/ML Hardware position at Google LLC in Sunnyvale, CA, United States.
Join us at Google LLC as our next TPU ASIC Verification Manager – AI/ML Hardware in Sunnyvale, CA, United States.
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