Wireless SOC Design Verification Engineer

Apple’s N1 wireless chip powers connectivity across every new iPhone — and its successor is already taking shape. As a Wireless SOC Verification Engineer, you’ll own your verification scope end-to-end — starting with a well-defined block or feature and growing in scope and complexity as you do. Over time, you’ll build depth in the IPs you know best and breadth across others, from block-level verification up toward subsystem and SOC integration.

You’ll own verification for your scope — with a mentor’s guidance as you build toward full ownership — on a chip that ships in every new iPhone, starting with a block or feature sized to where you are and expanding from there. You’ll work across the Power Management Unit, the CPU subsystem, on-chip debug infrastructure, PCIe, bus fabric, boot and secure-boot sequencing, and peripherals like SPI and UART — primarily through simulation, with exposure to formal verification as you grow.

Low-power is part of the picture too: you’ll get hands-on with power intent verification using UPF within your scope. AI is reshaping how the team works, and you’ll help apply AI-assisted tools for test generation, debug, or verification closure as part of your day-to-day.

• Pair with design early — shape the verification plan before RTL lands, not after.
• Debug corner-case failures and build the models — coverage or proof — that catch them.
• Verify low-power design intent using UPF within your scope.
• Grow into formal verification as your projects call for it — the team will help you ramp up, not expect you to arrive fluent.
• Shape the verification approach for your scope, with a mentor’s guidance — building toward full ownership as that scope grows.
• Verify end-to-end WiFi and Bluetooth traffic flows, from subsystem level up through top-level SOC integration.
• Push on AI-assisted verification — help the team find where it moves the needle.
• Get exposure to post-silicon bring-up when your project reaches that stage.

• Minimum requirement of a bachelors degree.
• Strong academic record (GPA).
• Proficiency in System Verilog.
• Strong analytical thinking and problem-solving skills.

• Familiarity with UVM methodology.
• Exposure to PCIe, Bus Fabric, NOC, AHB, AXI-based bus architectures in a UVM environment.
• Experience verifying IP or top-level integration for a WiFi or Bluetooth SOC.
• Experience with Formal Verification.
• In-depth knowledge and experience working with low power design, UPF integration, boot-up, power-cycling, HW/FW interaction verification.
• Should be a great teammate with excellent communication skills and the desire to seek diverse challenges.

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $129,300 and $225,300, and your base pay will depend on your skills, qualifications, experience, and location.

Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan.

• Comprehensive medical and dental coverage
• retirement benefits
• a range of discounted products and free services
• reimbursement for certain educational expenses — including tuition
• discretionary bonuses or commission payments as well as relocation

Note:

Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan…