TPU RTL Design Engineer AI Hardware Acceleration
Listed on 2026-11-04
-
Engineering
Hardware Engineer, Systems Engineer, Electronics Engineer
Google is shaping the future of AI/ML hardware acceleration with a focus on TPU architecture and its integration into AI/ML systems. This role involves SoC RTL design for data center accelerators, including management and control subsystems, clocking, reset, and chip management.
You will collaborate across software, hardware, and architecture teams to deliver cutting-edge digital designs. Join a team driving Google's TPU progression and global hyperscale computing, contributing to RTL
This is an excellent opportunity to take on the TPU RTL Design Engineer for AI Hardware Acceleration role at Google.
Full responsibilities and requirements are described in the listing above.
Learn more about the TPU RTL Design Engineer for AI Hardware Acceleration role in the description above.
We appreciate your interest in this position.
Join Google and contribute to our ongoing work.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).