Signal & Power Integrity Engineer HPC & 3D Packaging
Listed on 2026-11-04
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Engineering
Electronics Engineer, Systems Engineer, Test Engineer, Electrical Engineering
Google Sunnyvale, CA is seeking a Signal Integrity/Power Integrity Engineer to lead chip and package SI/PI design and verification. You will work across chip architecture, physical design, and validation teams to ensure robust SI/PI performance for HP platforms and TPU integration.
The role emphasizes collaboration, test environment setup, and automation using Python/MATLAB/C++. In-person interviews are typical, and compensation includes a substantial base with bonus and equity components.
We would love to welcome a new Signal & Power Integrity Engineer for HPC & 3D Packaging to our group in Sunnyvale, CA, United States.
Take a moment to read everything above and see whether this role is right for you.
This posting is for the Signal & Power Integrity Engineer for HPC & 3D Packaging role at Google LLC, based in Sunnyvale, CA, United States.
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