Senior Metrology Engineer, PIC Wafer Fab; InP
Listed on 2026-11-04
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Engineering
Electronics Engineer, Quality Engineering
Nokia's Photonic Integrated Circuit wafer fabs in Sunnyvale and San Jose develop and manufacture advanced InP semiconductor devices. The Metrology Engineer is responsible for sustaining and improving wafer fabrication processes through metrology, process characterization, defect analysis, and process control.
This role collaborates with Process Integration, Manufacturing, Equipment Engineering, and R&D teams to improve yield, product quality, and manufacturing performance.
Are you ready to take on the Senior Metrology Engineer, PIC Wafer Fab (InP) role at NOKIA?
We invite applications for the Senior Metrology Engineer, PIC Wafer Fab (InP) position located in Sunnyvale, CA, United States.
The following opening is for a Senior Metrology Engineer, PIC Wafer Fab (InP) with NOKIA.
Our organisation is growing, and we are hiring a Senior Metrology Engineer, PIC Wafer Fab (InP) in Sunnyvale, CA, United States.
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