Senior Signal Integrity Engineer - PAMSerDes
Listed on 2026-11-04
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Engineering
Electronics Engineer, Systems Engineer
Hewlett Packard Enterprise Development LP in California is seeking a Senior Signal Integrity Engineer to join our onsite team. The role centers on COM/channel margin analysis, ASIC PAM4 Ser Des modeling, and correlating simulations with measurements across packages, boards and connectors.
You will design PCB timing rules, tune Ser Des channels up to 200G, perform DVT measurements, and collaborate with vendors to improve model accuracy. Advanced PAM4 experience and CAD tools are required.
This position is for the Senior Signal Integrity Engineer - PAM4 Ser Des 200G role at Hewlett Packard Enterprise.
This opening is for the Senior Signal Integrity Engineer - PAM4 Ser Des 200G role at Hewlett Packard Enterprise.
We are seeking a motivated Senior Signal Integrity Engineer - PAM4 Ser Des 200G to join Hewlett Packard Enterprise in Sunnyvale, CA, United States.
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