Pre-Silicon Digital Verification Engineer UVM & Formal

Apple is seeking a pre-silicon digital verification engineer to join its mixed-signal ASIC team in Sunnyvale, CA. You will verify complex digital IPs, create verification plans, and own testbench development using System Verilog Assertions and UVM-based simulation.

You will also explore formal verification and other advanced techniques to ensure bug-free designs on first tapeout. As part of a small, high-performing group, you will review code, collaborate with architects and designers, and

For the Pre-Silicon Digital Verification Engineer UVM & Formal position at Hardware FYI, we are reviewing applications now.

Step into the Pre-Silicon Digital Verification Engineer UVM & Formal role at Hardware FYI in Sunnyvale, CA, United States and grow with us.

Please review the full job details above before applying.

If your experience matches this role, we encourage you to apply.