TPU ASIC Formal Verification Engineer
Listed on 2026-11-05
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Engineering
Test Engineer, Hardware Engineer, Electronics Engineer
Google is seeking an ASIC Formal Verification Engineer to shape and verify TPUs and AI/ML hardware acceleration. You will verify complex digital designs with a focus on TPU architecture and integration in AI/ML systems, contributing to project definitions, formal verification, and silicon bringup.
Join a team responsible for data-center accelerators and cutting-edge AI compute, collaborating with architecture and design teams to ensure high-coverage formal verification across multiple projects.
We invite applications for the TPU ASIC Formal Verification Engineer position located in Sunnyvale, CA, United States.
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This posting is for the TPU ASIC Formal Verification Engineer role at Google, based in Sunnyvale, CA, United States.
We are looking to fill the TPU ASIC Formal Verification Engineer position at Google in Sunnyvale, CA, United States.
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