Senior DFT Architect – Mixed-Signal ASICs

Avicena Tech is seeking a DFT Lead to own the test architecture of a mixed-signal ASIC, from scan and BIST through analog test access and production test delivery. You will define the strategy, implement and verify it, and collaborate with product/test engineering to bring it up on the tester.

You will drive DFT features, ensure coverage and timing targets, and coordinate with design teams. This role requires 10+ years in DFT on production ASICs and hands-on experience with Tessent/Synopsys

Are you ready to take on the Senior DFT Architect – Mixed-Signal ASICs role at Avicena Tech?

This is a genuine opening to take on the Senior DFT Architect – Mixed-Signal ASICs role at Avicena Tech.

As a Senior DFT Architect – Mixed-Signal ASICs, you will play an important part at Avicena Tech in Sunnyvale, CA, United States.