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ASIC & FPGA Design Engineer – E2

Job in City of Syracuse, Syracuse, Onondaga County, New York, 13201, USA
Listing for: Anysilicon
Full Time position
Listed on 2026-10-16
Job specializations:
  • Engineering
    Systems Engineer, Embedded Software Engineer, Hardware Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 90000 - 130000 USD Yearly USD 90000.00 130000.00 YEAR
Job Description & How to Apply Below

Lockheed Martin is seeking a Mid Career Firmware Engineer (FPGA Design) to join their team in Syracuse, NY. The company values innovation, integrity, and a collaborative work environment, offering a flexible schedule to promote work-life balance. The role involves designing and implementing FPGA firmware architecture and custom digital board designs, with a focus on digital signal processing and high-speed communications.

Responsibilities:
  • Perform complex FPGA firmware architecture and custom digital board designs.
  • Design digital signal processing, messaging, control, and high-speed communications.
  • Interface and collaborate with program leadership and teammates regularly.
  • Estimate, break down, and plan work for the firmware team.
  • Develop, design, verify, and document ASIC and FPGA development.
  • Determine architecture design, logic design, and system simulation.
  • Analyze all aspects from high-level design to synthesis, place and route, and timing and power utilization.
Qualifications:
  • Bachelor's degree in an engineering discipline (Mechanical, Electrical, or Computer Engineering).
  • 2 to 5 years of professional experience in FPGA architecture and design.
  • Technical expertise to implement designs with minimal direction.
Skills:
  • Strong knowledge of Xilinx, Intel, or Microsemi FPGA devices and their application environments.
  • Excellent oral, written, and presentation skills.
  • Ability to manage multiple tasks simultaneously and guide major program completions.
  • Extensive VHDL firmware programming capability on FPGA devices.
  • Experience with Xilinx Vivado, Intel Quartus, or Microsemi Libero development platforms.
  • Familiarity with Mentor Questa HDL simulator and UVM verification techniques.
  • Experience with MATLAB modeling, Nvidia CUDA, OpenCL, Simulink HDL Coder, and Xilinx System Generator is a plus.
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