Principal Analog/Mixed-Signal Design Engineer
Job in
Tempe, Maricopa County, Arizona, 85285, USA
Listed on 2025-12-28
Listing for:
Alphacore Inc
Full Time
position Listed on 2025-12-28
Job specializations:
-
Engineering
Systems Engineer, Electronics Engineer, Electrical Engineering, Hardware Engineer
Job Description & How to Apply Below
Principal Analog/Mixed-Signal Design Engineer
As a Principal Analog/Mixed-Signal Design Engineer, you will provide technical leadership and drive the development of high-performance mixed-signal ICs. You will define architectures, lead key circuit design efforts, collaborate across layout and system teams, and play a central role in silicon bring‑up and performance optimization. You will also mentor engineers and influence long‑term design methodologies and IP strategy.
Responsibilities:- Architect, design, and optimize high‑performance mixed‑signal IP and data conversion subsystems.
- Own development from initial concept, schematic design, and layout interaction through tapeout and silicon validation.
- Perform advanced transistor‑level analysis (noise, linearity, jitter, sampling behavior, dynamic performance, Monte Carlo).
- Lead parasitic‑aware layout strategies and guide floor‑planning and matching techniques for high‑performance designs.
- Drive silicon bring‑up, identify performance gaps, root‑cause issues, and close the loop to final product‑level specifications.
- Contribute to multi‑generation IP roadmaps, design methodology improvements, and strategic technical decisions.
- Master’s degree in Electrical/Electronics Engineering with 10+ years of analog/mixed‑signal IC design experience, or Ph.D. with 5+ years relevant experience.
- Proven track record of architecting and delivering complex mixed‑signal IP to silicon, such as data converters, analog front‑ends, sampling circuits, precision amplifiers, or clocking/PLL systems.
- Deep understanding of analog/mixed‑signal design fundamentals (device noise, matching, feedback, clocking/synchronization, parasitic‑aware design).
- Demonstrated experience in silicon debug and closing performance to meet production targets.
- Strong communication skills and ability to lead technical decision‑making.
- Experience with advanced CMOS or FinFET nodes.
- Experience with digitally‑assisted calibration or mixed‑signal correction algorithms.
- Customer, product, or architecture‑level technical leadership.
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