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Analog Designer - Timing

Job in Tempe, Maricopa County, Arizona, 85285, USA
Listing for: Ipro Networks Pte. Ltd.
Full Time position
Listed on 2026-10-03
Job specializations:
  • Engineering
    Electronics Engineer, Hardware Engineer, Electrical Engineering
Salary/Wage Range or Industry Benchmark: 150000 - 250000 USD Yearly USD 150000.00 250000.00 YEAR
Job Description & How to Apply Below
About the Role

Intellipro is hiring an Analog Designer – Timing to join the timing product development team. This is a full-time, on-site role. You will work on novel timing products addressing high-speed, high-performance requirements from the world's top customers, developing best-in-class timing products with a talented and experienced team.

Responsibilities
  • Provide important contributions to the timing product for high-performance networking, communication, and data center products.
  • Follow the whole product development process from product definition to release.
  • Design key modules and integrate top-level schematics.
  • Participate in product definition, process selection, lab verification, and release to production.
  • Guide layout engineers.
  • Grow with the team and company in technical, managerial, and financial aspects.
Requirements
  • Passion for and knowledge of mixed-signal design, especially PLL and other timing product design.
  • Familiar with mixed-signal IC design, methodology, and process.
  • Understand high-speed transistor modeling and circuit noise theory; solid understanding of phase noise and jitter.
  • Deep knowledge of silicon physics, silicon processes, and IC packaging technologies.
  • Good understanding of thermal, mechanical, and packaging challenges; knowledge of high-volume manufacturing technologies and production variance.
  • Experience with mixed-signal design tools such as Cadence Spectre and AMS.
  • Able to model both modules and top level with Verilog-AMS and/or other languages.
  • Experience with high-speed I/O and ESD is a plus.
  • Experience with ≤65nm CMOS technologies is a plus.
  • Experience with delta-sigma modulator theory is a plus.
  • Education:

    MSEE with 3+ years of experience. Level: Staff and above.
Compensation

Base salary: USD 150,000–250,000 per year.

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