Senior Space Design Verification Engineer
Listed on 2026-10-06
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Engineering
Test Engineer, Electronics Engineer, Quality Engineering
Viasat is seeking a Senior Design Verification Engineer in the United States to lead RTL verification for FPGA and ASIC designs. You will create tests, develop System Verilog/UVM test benches, and drive coverage and regressions with the RTL team.
You will evaluate tools like Questa, Xcelium and VCS, manage resources, and ensure timely delivery in a fast-paced, site-based environment. Travel up to 10% may be required.
We are seeking a motivated Senior Space Design Verification Engineer to join Viasat in Tempe, AZ, United States.
Join us at Viasat as our next Senior Space Design Verification Engineer in Tempe, AZ, United States.
We are currently recruiting a Senior Space Design Verification Engineer for our team in Tempe, AZ, United States.
This is a great opening to take on the Senior Space Design Verification Engineer role at Viasat.
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