Senior CPU Verification Engineer

Introduction to Arm

You know us. With 125 Arm-powered products shipped every second, we'll be in over a trillion smart devices by 2035. Your smartphone, award-winning VR gaming, the world's fastest supercomputer – our engineers are crafting the sophisticated core processors leading the race towards a connected, autonomous, hyper-performance future. ARM designs the technology that is at the heart of sophisticated digital products, from wireless, networking and consumer entertainment solutions to imaging, automotive, security and storage devices.

ARM improves people’s lives by enabling the intelligence in affordable, easy-to-use electronic products that transform the way we live and work. We work in partnership with a global network of leading technology companies which are using our smart low‑power technology. Together we are enabling the future of a better world. ARM is well recognized as the market leader in the CPU and System IP industry and this has been achieved by consistently delivering reliable and high quality IP products.

The cost of design and manufacturing is high and that warrants a "right first time" approach for all IP and System products. Time‑to‑market is essential for our partners to take care of steadfast competition in the marketplace, being first would enable them to get premium value from the end products. In this context, Design Verification of CPU IPs is an exciting challenge requiring an engineering abilities that is both broad and deep.

So, we promise you endless exciting opportunities to experiment and go even further in CPU IP design!

As an Engineer responsible for CPU Random Tools for stress verification, you will work on a sophisticated Random Instruction Sequences (RIS) tool. With a combination of techniques, the tool verifies the functionality of our CPU cores, being designed in Austin (US), Cambridge (UK) or Sophia Antipolis (FR). The existing team ensures addition of new architecture features, its customization to specific CPU cores, and provides support.

You will be based in Arm’s Bangalore design centre in India.

As Senior Verification Engineer, your role will cover the development of the tool from development to deployment, and you will be accountable for:

• Understanding the intricacies of the CPU micro‑architecture and defining how to push the test boundaries;
• Architect and develop solutions to improve the generation of stimuli to produce programs to stress our next generation CPUs;
• Implementing and supporting the tool, from the early stages of CPU development to product maturity.

• Problem Ownership and ability to work from abstract requirements
• Good communication and presentation skills
• Self‑motivated and willing to take up additional responsibilities
• Quick learner with a strong desire to learn and develop new skills

• B.Tech/B.S. or MTech/M.S. in Computer/Electronics Engineering or Computer Science from a reputed institute
• 5‑10 years of stable proven experience with significant project contributions

• You hold experience in software design, and should be comfortable working with low‑level hardware
• You have good solid understanding of programming languages, such as C and Python
• You are knowledgeable about CPU architecture and micro‑architecture concepts
• You are able to understand assembly language (ASM)
• You have strong interpersonal skills and ability to work well as part of a team with the willingness to tackle varied technical challenges.

• Fundamentals of Processor Architecture.
• Basics of ARM Architecture.
• Familiarity with EDA tools and Hardware Design Verification.

Our 10x mindset guides how we engineer, collaborate, and grow. Understand what it means and how to reflect 10x in your work:

At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information…