Senior RF IC Layout Engineer

Capgemini Engineering seeks a Senior Analog and RF IC Layout Engineer in Toronto, Canada. This hybrid role emphasizes high-speed mixed-signal silicon design and collaboration with top engineers.

You will lead the creation of advanced layouts for complex high-speed analog and RF mixed-signal blocks. Utilizing industry-standard EDA tools, you'll work closely with design, verification, and process teams throughout the layout lifecycle. The focus will be on implementing layouts in advanced FinFET technologies, driving quality and performance across next-generation products.

Key Responsibilities:

• Lead layout design from concept to tape-out

• Develop layouts in advanced CMOS FinFET nodes

• Collaborate with engineers on layout quality and manufacturability

• Manage floor planning and top-level chip assembly

• Drive layout verification and compliance reviews

Requirements:

• 6+ years in Analog and RF IC layout

• Experience with EDA tools like Cadence and Synopsys

• Proven layout of high-performance analog blocks

• Expertise in floor planning and thermal-aware practices

• Strong skills in signal integrity and routing

Elevate your engineering career with Capgemini, focusing on high-speed silicon design and mentoring juniors.
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