Senior ASIC Design Methodology Engineer

Join Tenstorrent in Toronto as a Senior ASIC Design Methodology Engineer, focusing on RTL design and verification for AI technology. Drive enhancements to design quality and scalability.

This role at Tenstorrent requires a skilled engineer with expertise in ASIC design methodology, RTL design, and the physical implementation of AI accelerators. You will develop strategies for verification and collaborate across teams for successful silicon outcomes. Your work will involve automating design tooling and workflows to maximize efficiency.

Key Responsibilities:

• Develop ASIC design methodologies for efficient AI accelerators

• Improve RTL design quality and overall scalability

• Design verification strategies for processor IP and components

• Enhance physical implementation processes for performance

• Automate workflows to optimize design efficiency

Requirements:

• Experience in ASIC design methodology and verification

• Proficient in AI accelerator development

• Strong with industry design tools and scripting

• Excellent problem-solving and communication skills

Show your expertise in ASIC methodologies and AI accelerators at Tenstorrent in Toronto.
#J-18808-Ljbffr