Design Verification Engineer, Annapurna Labs

Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform, and our Custom Silicon organization is revolutionizing how we deliver cloud services to our customers. You’ll be part of a team that drives innovation in custom chip development, directly impacting the future of cloud computing.

As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be developing hardware solution for AWS data center including AWS Inferentia,Trainium systems - custom designed machine learning data center accelerator.

We are looking for a passionate Design Verification Engineer to join our newly formed team responsible for verifying high-speed I/O and scale-up/out components across the SoC. You will take full ownership of delivering comprehensive verification solutions at a sub-system/chip level, with strong emphasis on system-wide implications and interactions. This role requires developing and implementing verification environments using state-of-the-art simulation methodology. You will create robust test scenarios and collaborate closely with design, architecture, and software teams to ensure thorough coverage of hardware-software interfaces and cross-module functionality.

Key job responsibilities
- Own the development and execution of verification plans for components at sub-system and chip levels
- Build and implement verification environments using advanced simulation methodologies and industry-standard tools
- Define, create and execute comprehensive test scenarios covering system-level flows, critical paths, and corner cases
- Drive coverage closure and verification sign-off to ensure high-quality, tape-out ready design

BASIC QUALIFICATIONS

- Bachelor's degree in Electrical Engineering or a related field

- Experience with test plan development, building the necessary test bench infrastructure, developing tests and verifying the design
- 4+ years of design verification experience using constrained-random simulation techniques (such as UVM)
- 4+ years of experience in testbench development including stimulus, checkers, assertions and coverage

PREFERRED QUALIFICATIONS

- Experience with C/C++ and Object-Oriented Programming

- Experience with AMBA protocols, for e.g. AHB/APB/AXI

- Experience with interconnect protocols, such as PCIe and UCIe

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