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Electrical Design Engineer; Contingent

Job in Toronto, Ontario, C6A, Canada
Listing for: Kepler Communications Inc.
Full Time position
Listed on 2026-07-16
Job specializations:
  • Engineering
    Electronics Engineer, Test Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 113474 - 163474 CAD Yearly CAD 113474.00 163474.00 YEAR
Job Description & How to Apply Below
Position: Electrical Design Engineer (Contingent)

At Kepler Communications, we’re not just imagining the future of on‑demand space connectivity – we’re leading it!

Our mission is to provide real‑time Internet access for space‑based assets, enabling a new era of data‑driven exploration and innovation. With 33 satellites launched to date, Kepler operates the first commercial optical data relay constellation, supporting continuous space communications and advanced on‑orbit compute and hosted payload capabilities.

Our technology is only part of the story. What sets us apart is our team: bold thinkers, skilled builders, and passionate problem‑solvers who thrive on pushing the boundaries of what’s possible in space. We believe great ideas come from diverse perspectives and are committed to creating an environment where you can grow, lead, and make a global impact.

If you’re ready to reach higher, move faster, and work that shapes the future space economy, this is your launchpad. Come build the future with Kepler!

What We Offer
  • Competitive compensation with a robust equity plan to share in our success.
  • Unlimited vacation, supportive parental leave policy, and company‑wide holiday shutdown.
  • Semi‑annual company‑wide parties and frequent in‑office team events.
  • Relocation packages available for approved roles.
  • $1,500 annual professional development fund to support your growth.
  • Fully stocked Toronto office kitchen with snacks, drinks, games and top‑notch kitchen appliances.
  • Town Halls, Celebration Calls, and Company‑wide events to stay connected and engaged.
  • We’re a certified Great Place to Work®, five years in a row!

Position:
Electrical Design Engineer
– to support the development of the electrical and communication interface of Kepler’s satellite payload, a communication router between multiple communication protocols including Optical, Ku‑band, and S‑band.

Key Responsibilities
  • Develop hardware solutions to support Kepler’s space technology using leading technology and practices.
  • Support design reviews for active designs to minimize design gaps.
  • Conduct and document engineering analysis including derating, reliability, radiation, EMI/EMC, FMECA, and power budgets.
  • Support pathfinding development for future satellite generations utilizing new technology and interfaces such as UFS, 10G+ Ethernet, PCIe5, and other high‑speed interfaces, new memory technology, and processors.
  • Maintain technical documentation that captures design decisions, specifications, block diagrams, interface requirements, and system architecture reports.
  • Develop full product solutions by working closely with cross‑functional engineering teams including RF, mechanical, software, and FPGA.
Required Skills & Qualifications
  • Bachelor’s Degree in Electrical Engineering or equivalent.
  • 4+ years of experience designing, developing, and validating complex electronic hardware systems from concept through production, with demonstrated ownership of technical deliverables and successful design execution.
  • Proven ability to lead hardware development efforts from concept definition through schematic design, PCB layout and/or layout oversight, integration, verification, and design validation testing.
  • Strong proficiency with industry standard schematic capture and PCB layout tools such as Altium Designer or equivalent.
  • Proven experience integrating processors, FPGAs, and SoCs into high‑performance embedded systems, including successful implementation and debugging of high‑speed digital interfaces.
  • Ability to design and validate mixed‑signal circuitry incorporating ADCs, DACs, sensors, and precision analog signal chains while meeting performance requirements such as noise, accuracy, and dynamic range.
  • Demonstrated success implementing and troubleshooting high‑speed interfaces such as JESD
    204B, Ethernet (1G/10G+), PCIe, or equivalent protocols, including signal integrity considerations and laboratory validation.
  • Familiarity with clocking architectures, oscillator selection, timing distribution, and synchronization requirements in complex digital systems.
  • Proven capability designing passive and active analog signal‑conditioning circuits, including filter design, analysis, and validation.
  • Ability to identify technical risks early,…
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