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Job Description & How to Apply Below
As a key member of the Heterogeneous Integration Group, you will oversee DFT architecture, implementation, and signoff for innovative SoC designs. Your expertise will bridge RTL design, verification, and physical design to ensure efficient test solutions throughout development and production. This pivotal role emphasizes close teamwork to optimize testability and diagnosability.
Key Responsibilities:
• Own SoC-level DFT implementation and architectures
• Drive DFT architecture definition during the design cycle
• Implement DFT logic across block and full-chip levels
• Execute DFT flow including lint and rule checks
• Collaborate with teams to ensure optimized DFT solutions
Requirements:
• Bachelor’s degree in Electrical or Computer Engineering
• 7+ years in SoC design or DFT for digital ASICs
• Experience with scan, MBIST, and JTAG architectures
• Familiarity with RTL-to-GDS flows and EDA tools
• Proficient in scripting languages for flow automation
Become a pioneer in DFT solutions with Micron's advanced technology.
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