SoC Debug and Trace Architect

SoC Debug and Trace Architect ut the role Tenstorrent is creating advanced AI hardware and RISC-V CPUs. This role focuses on diagnosing intricate technical problems across silicon, firmware, and software to ensure the reliability of our AI compute platforms.

Key facts

Location:

Toronto, Ontario, Canada Engagement:
Hybrid

• Lead post-silicon debug efforts for AI accelerator platforms by investigating hardware and firmware failures on silicon, boards, and systems.
• Identify root causes of issues related to power, thermal, GDDR, PCIe, Ethernet/Ser Des, NoC, and firmware.
• Create diagnostic tools and automation frameworks using Python and C to speed up failure analysis.
• Use lab instruments such as protocol analyzers, logic analyzers, and oscilloscopes to troubleshoot system-level errors.
• Evaluate register states, schematics, telemetry, and firmware performance to resolve complex hardware problems.

• Experience with post-silicon bring-up and hardware debug for SoC, CPU, or ASIC systems.
• Understanding of microarchitecture and processor architecture, specifically RISC-V, ARM, or x86.
• Familiarity with trace and debug methodologies like iJTAG.
• Ability to perform root-cause analysis across hardware, software, and firmware domains.
• Experience working in a lab environment building scalable debug methodologies and automation.
• Ability to work across validation, ASIC, software, and firmware teams.

• Python
• C
• iJTAG
• Oscilloscopes
• Logic analyzers
• Protocol analyzers
• RISC-V, ARM, or x86 architecture
• GDDR/DDR
• PCIe
• Ethernet/Ser Des

This role is open to various experience levels, and final compensation will be determined based on the assessed level during the interview process. Employment is contingent upon the candidate being eligible to access U.S. export-controlled technology under U.S. Export Administration Regulations. Candidates may need to provide proof of citizenship or residency status, or obtain export license approval.