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Job Description & How to Apply Below
Qualcomm Canada ULC is seeking a Senior ASIC Physical Design Engineer to lead end-to-end physical design flow for complex SoC and retimer ASICs, driving floor planning, CTS, placement, routing and signoff to meet aggressive PPA targets.
You will collaborate with front-end, analog/Ser Des, DFT, packaging and validation teams to ensure tapeout readiness, perform timing analysis, and optimize power delivery while managing schedules and risk throughout large-die implementations.
#J-18808-LjbffrPosition Requirements
10+ Years
work experience
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