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Job Description & How to Apply Below
In this full-time role, you will develop and optimize FPGA routing algorithms, impacting design efficiency and usability. Collaborate with cross-functional teams while analyzing complex design challenges. Your expertise in C/C++, algorithms, and FPGA flows will be crucial for performance optimization and toolchain integration.
Key Responsibilities:
• Design and optimize FPGA routing algorithms for better performance
• Contribute to compiler enhancements in placement and timing
• Improve memory efficiency and scalability of routing solutions
• Collaborate with architecture and hardware teams on strategies
• Debug routing congestion and develop effective solutions
Requirements:
• 1+ years of experience in FPGA/ASIC design or EDA
• Strong knowledge of graph algorithms and optimization
• Proficient in C/C++ and software development practices
• Familiarity with routing algorithms and timing methodologies
• Bachelor’s Degree in a related field
Bring your expertise to Altera and help shape the future of FPGA technology in Toronto.
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