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Onsite FPGA Design Engineer — Secret Clearance Required

Job in Tucson, Pima County, Arizona, 85718, USA
Listing for: Raytheon
Full Time position
Listed on 2026-10-11
Job specializations:
  • Engineering
    Electronics Engineer, Systems Engineer
Salary/Wage Range or Industry Benchmark: 57000 - 109000 USD Yearly USD 57000.00 109000.00 YEAR
Job Description & How to Apply Below
Position: Onsite FPGA Design Engineer I — Secret Clearance Required

RTX in Tucson, AZ seeks a Digital Electrical Engineer I to design and develop next‑generation circuit card assemblies (CCAs) and FPGA‑based solutions using AMD, Altera, and Microchip architectures. You will contribute across the full lifecycle from concept to production with agile, cross‑functional teams.

Responsibilities include digital architecture, HDL coding, test, validation, documentation, and collaboration with systems, mechanical, and software engineers.

Step into the Onsite FPGA Design Engineer I — Secret Clearance Required role at Raytheon in Tucson, AZ, United States and grow with us.

This opening is for the Onsite FPGA Design Engineer I — Secret Clearance Required role at Raytheon.

We are seeking a motivated Onsite FPGA Design Engineer I — Secret Clearance Required to join Raytheon in Tucson, AZ, United States.

Consider building your career as a Onsite FPGA Design Engineer I — Secret Clearance Required at Raytheon.

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