RTL Design Engineer at AMD

Drive innovative ASIC design as an RTL Design Engineer at AMD, focusing on cutting-edge IP for next-generation computing in Vancouver. Leverage AI solutions for enhanced design productivity and quality.

At AMD, we’re seeking a hands-on ASIC Design Engineer with a deep understanding of IP RTL design. This senior role requires expertise in architecture development, RTL implementation, and verification support. You will engage with IP and system architects while contributing creatively to the design of high-performance products.

Key Responsibilities:

• Design IP RTL for AMD's PCI Express technology

• Collaborate with architects on micro-architectural features

• Implement low power design techniques into existing systems

• Ensure quality RTL through timing, LINT, and CDC closure

• Support ASIC verification and debugging phases

Requirements:

• Expertise in RTL coding using Verilog HDL

• Familiarity with AI-assisted design methodologies

• Experience with multiple clock domain designs

• Knowledge of lint and CDC tools

• Bachelor's or Master's in Computer/Electrical Engineering

Utilize your RTL design skills at AMD and positively impact next-generation computing.
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