Tech Lead - Memory Layout Engineer (FinFET, 3nm/5nm
Job in
Vancouver, BC, Canada
Listed on 2026-08-11
Listing for:
K&K Global Talent Solutions INC.
Full Time
position Listed on 2026-08-11
Job specializations:
-
Engineering
Electronics Engineer, Systems Engineer, Hardware Engineer
Job Description & How to Apply Below
K&K Global Talent Solutions INC. is seeking an experienced Technology Lead – Memory Layout Engineer to design and develop high-performance memory layouts for advanced semiconductor technologies.
The role requires expertise in memory layout, physical verification, and FinFET architectures, with hands-on Cadence Virtuoso and Calibre experience. The candidate will optimize layouts for performance, power, and area, and collaborate with cross-functional teams to ensure timely project delivery.
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