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Senior Principal Embedded System Architect (HW/SW Co-Design)
About the Role
The Software and Digital Platform Group is looking for a Senior Principal Embedded System Architect to serve as a premier technical lead within our HW/SW Co-Design and System Architecture team, with a bias towards the software side of system architecture This is not a role about drawing abstract boxes on slides. It’s about enabling effective downstream chip development through earlier virtual-platforms, data-backed architectural exploration, and hands-on data flow analysis at the system level.
Your primary responsibility is ensuring a strong software voice is present during the critical design and architecure phases. You’ll ensure we are making the right architectural decisions and tradeoffs early in the SoC and IP design cycle well before silicon exists.
You will work hand-in-hand with a hardware architect counterpart from day one. You will ultimately be a proxy for customers and downstream software teams during architecture definition, ensuring that every major design decision -- from IP block selection to data flow topology -- accounts for the software developer experience, real-world performance, field debuggability, and customer usability. We believe that excessive software complexity to compensate for hardware design decisions is a design failure.
This role exists to prevent exactly that.
Responsibilities
Lead SoC co-architecture alongside digital/analog teams to balance hardware complexity, software efficiency, and customer usability at product definition.
Build SystemC-based virtual platforms and develop proof-of-concept code to profile, model, and validate design choices before RTL is written.
Translate complex use cases into requirements, assessing data paths and co-defining hardware accelerators to optimize software execution.
Define and develop core architecture for bootloaders, initialization sequences, microcode, and kernel drivers.
Champion best-in-class hardware debuggability/observability from early silicon bring-up through field deployment.
Act as the premier technical proxy for customer software teams, while providing high-level mentorship across the hardware/software boundary.
Minimum Qualifications
BS/MS in EE, CE, or CS with 20+ years of system software architecture or firmware development experience.
Proven track record of operating at the highest technical levels to influence hardware design early in the silicon lifecycle.
Deep knowledge of memory hierarchies, AMBA bus protocols (AXI/AHB/APB), DMA, and RISC-V/ARM architectures.
Hands-on experience with SystemC (TLM 2.0) for early architecture exploration.
Expert in C/C++ writing embedded software, bootloaders, and drivers within RTOS (Zephyr) and Embedded Linux environments.
Experienced in silicon bring-up and JTAG debugging, with the ability to read RTL (Verilog/System Verilog) to evaluate hardware intent.
Exceptional skills in presenting complex architectural tradeoffs to hardware engineers, executives, and customer teams.
Preferred Qualifications
Accessibility for Ontarians with Disabilities Act (AODA):
Analog Devices Canada Ltd. has a process in place and provides accommodations for employees with disabilities. To request an accommodation, please contact Connections HR Services at or at .
Experienced Required Travel:
Yes, 10% of the time
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