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Job Description & How to Apply Below
Join AMD as an ASIC Design Engineer in our IOHUB Team focused on leading-edge I/O technologies. This role demands strong analytical skills and hands-on leadership in complex projects.
As an ASIC Design Engineer at AMD, you'll drive innovation in our NBIO organization and engage in all aspects of IP design. Your contributions will directly impact data center and machine learning workloads. We're looking for a detail-oriented individual who excels in problem-solving and possesses strong communication skills for collaboration across global teams.
Key Responsibilities:
• Understand IOHUB functional and performance requirements
• Drive IP/SOC design infra decisions for optimal consumption
• Liaise between IP and SOC teams for layout issues
• Scope project requirements and resources efficiently
• Lead a small team to meet program development goals
Requirements:
• Proven ASIC design and RTL experience
• Proficiency with synthesis tools and timing closure
• Strong Verilog and System Verilog background
• Excellent written and verbal communication skills
• Ability to function independently in driving tasks
Bring your expertise in ASIC design and commitment to quality to advance AMD's innovative technologies.
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