ASICS Design Verification Engineer; Levels British Columbia ASICS Engineering

Position: ASICS Design Verification Engineer (Multiple Levels   British Columbia  + 1 more ASICS Engineering
## ASICS Design Verification Engineer (Multiple Levels) - Vancouver OR Markham Vancouver, British Columbia, Canada Apply Now Find out how well you match with this jobJob :
3095256##
** Company:
** Qualcomm Canada ULC##
** Job Area:
** Engineering Group, Engineering Group  ASICS Engineering
** General

Summary:

** As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.  The team is responsible for the complete verification lifecycle, from system-level concept to tape out and post-silicon support. The responsibility of the position involves comprehensive pre-silicon test planning for digital power IP's, its testbench development using the advanced verification methodology such as System Verilog-UVM, coverage development, assertion model development and formal verification (property checking).

Learn and deploy power-aware UPF verification flow and methodology. Involve in developing automation to improve verification efficiency**. New Position*
* ** Qualifications
* ** Bachelor's degree in Engineering, Science, or a closely related field
* 2+ years of experience, with ASIC design and verification tools, techniques, and methodology
* New grad with relevant co-op, intern or PEY experience.  
** Preferred Qualifications
*** Master’s degree in Computer Science, Electrical Engineer, Computer Engineering, or a closely related field
* 6+ years of experience with ASIC design and verification tools, techniques, and methodology
* 6+ years of experience with digital design concepts and RTL languages such as System Verilog or Verilog, or VHDL.
* 6+ years of experience with computer architecture fundamentals, Object-oriented programming concepts and C or C++ programming skills.
* 6+ years of experience with developing block-level testbench environment using System Verilog
* 6+ years of experience with verification methodologies through coursework or past experiences such as UVM or OVM and exposure to Assertion based Formal Verification
* 6+ years of experience with scripting/automation skills using either Perl or python
* Experience with AMBA Bus protocol (AXI/AHB/APB etc) is desirable (not mandatory)
* Knowledge or experience with Assertion Based Formal Verification is desirable (not mandatory)
*
* Minimum Qualifications:

*
* • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR  Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
OR  PhD in Science, Engineering, or related field.
** Applicants**:
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disabili or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process.

Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other…