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Senior Ams Verification Leader

Job in 21100, Varese, Lombardia, Italy
Listing for: Altro
Full Time position
Listed on 2026-09-27
Job specializations:
  • Engineering
    Test Engineer, Electronics Engineer
Salary/Wage Range or Industry Benchmark: 70000 - 110000 EUR Yearly EUR 70000.00 110000.00 YEAR
Job Description & How to Apply Below
In this role you lead mixed-signal verification efforts for automotive and industrial products within NXP’s Advanced Power System team. You’ll define verification strategies, drive methodology improvements, and collaborate with global experts to deliver robust silicon with strong quality. You will own AMS verification deliverables from specification to silicon correlation and bridge digital and analog verification flows. This position offers impact across complex ASIC/mixed-signal projects and opportunities to shape verification practices ual incentive opportunities
equity
competitive benefits package
Lead AMS verification activities and guide engineers toward successful project delivery
Define verification plans, strategies, environments, regressions, and coverage objectives
Develop and validate mixed-signal simulation environments, models, checkers, and reusable components
Bridge digital and mixed-signal verification flows for robust top-level verification
Drive methodology improvements to increase simulation efficiency, reuse, quality, and cost effectiveness
Support design reviews, bug tracking, post-silicon correlation, and continuous improvement across projects
Own key AMS verification deliverables from specification review to silicon correlation
10+ years of experience in AMS or mixed-signal IC verification
Strong experience leading verification activities for complex ASIC or mixed-signal IC projects
Solid knowledge of analog fundamentals, digital RTL debug, co-simulation, and mixed-signal verification methodologies
Hands-on experience with verification plans, test benches, regressions, coverage, reviews, and bug closure

Experience with Verilog, System Verilog, UVM, SVA, Verilog-AMS, SystemC, WREAL/RNM modelling

Experience with EDA tools such as Cadence Virtuoso, Xcelium, Spectre, and vManager
Good scripting skills in Python, Perl, or TCL, and experience with Git, SVN, or Design Sync
Analytical mindset
Strong ownership
Structured problem-solving
AMS/mixed-signal verification
Senior AMS Verification leader varese, lombardia, it
Position Requirements
10+ Years work experience
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