ASIC Timing Design & Sign-off Engineer
Listed on 2026-10-07
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Engineering
Electronics Engineer, Engineering Design & Technologists, Hardware Engineer, Systems Engineer
Apple Inc. in Waltham, MA is seeking an ASIC STA Engineer to manage all aspects of SoC timing from synthesis to sign-off. You will own timing sign-off, develop STA flows, and collaborate with RTL, CAD and Physical Design teams to drive timing closure.
The ideal candidate has a BS in Electrical Engineering with 2+ years in ASIC timing, strong Primetime skills, and proficiency in Tcl/Perl scripting. Strong cross-team communication is essential.
This is a great position to take on the ASIC Timing Design & Sign-off Engineer role at Apple Inc.
Please review the full job details above before applying.
If your experience matches this role, we encourage you to apply.
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The position is based in Waltham, MA, United States.
This opportunity is part of our work in Engineering.
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