×
Register Here to Apply for Jobs or Post Jobs. X

Principal EDA Engineer

Job in Wilmington, Middlesex County, Massachusetts, 01887, USA
Listing for: Analog Devices
Full Time position
Listed on 2026-08-29
Job specializations:
  • Engineering
    Systems Engineer, Test Engineer
Salary/Wage Range or Industry Benchmark: 159638 - 239457 USD Yearly USD 159638.00 239457.00 YEAR
Job Description & How to Apply Below
About Analog Devices Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers.

With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at  and on Linked In and X .ADI is seeking a Principal EDA Engineer with deep expertise in Calibre-based physical verification, code development, and tapeout support for advanced analog and mixed-signal programs. This role serves as a technical authority for signoff methodology, rule deck implementation, verification flow development, and critical tapeout readiness across multiple projects and process nodes.

The engineer in this role will lead the development and optimization of Calibre-driven flows, build code and tools that extend verification capability, and partner closely with design and layout teams to resolve high-impact issues from project setup through final signoff.

Key Responsibilities Calibre Technical Authority :
Serve as a recognized expert for Calibre-based physical verification flows, including DRC, LVS, ERC, PERC, parasitic extraction, and signoff methodology

Verification Flow Development :
Define, develop, maintain, and optimize Calibre verification flows and supporting infrastructure for analog and mixed-signal design teams

Rule Deck and Code Development :
Write, debug, and enhance SVRF and TVF rule sets, along with custom code and scripts that extend Calibre capabilities, improve debug efficiency, and strengthen flow reliability

Tapeout Support Leadership :
Lead or guide tapeout readiness activities, including final signoff checks, waiver management, antenna-related issue resolution, deliverable preparation, and coordination of critical verification closure items

Foundry Rule Integration :
Drive intake, validation, integration, and versioning of foundry rule files and process updates for advanced-node programs

Critical Debug and Escalation :
Resolve the most complex verification, runset, extraction, and rule deck issues affecting project execution or tapeout schedules

Project Enablement :
Support new project setup, verification environment readiness, and early issue identification so design teams can avoid downstream signoff risk Tooling and Automation :
Build internal tools, scripts, dashboards, and reporting utilities that improve verification visibility, XOR analysis, runtime efficiency, and license or compute usage

Technical Guidance and Mentorship :
Provide training, documentation, and expert guidance to engineers using verification flows and signoff methodologies across the organization

Must Have Skills Calibre Expertise :
Expert-level proficiency with Mentor Calibre across DRC, LVS, ERC, PERC, extraction, and signoff flows

Rule Deck Development :
Deep hands-on experience writing, debugging, and maintaining SVRF and TVF rule sets for advanced-node verification

Code and Tool Development :
Strong experience developing code, scripts, and internal tools that utilize and extend Calibre workflows, including automation, result parsing, analysis, and debug support

Tapeout and Signoff Support :
Proven experience supporting tapeouts, final verification closure, waiver flows, antenna-related issues, and foundry-facing signoff requirements

Advanced Node Experience :
Strong experience with TSMC design rules, rule deck integration, and physical verification challenges at nodes such as 16nm, 5nm, and 4nmDebug Leadership :
Ability to lead resolution of complex backend verification and extraction issues with significant project or schedule impactEDA Environment Knowledge :
Strong understanding of Linux-based EDA environments, compute infrastructure, license usage, and version-controlled design data workflows

Cross-Functional Technical Support :
Ability to work effectively with analog layout, design, CAD, and project teams in a fast-paced multi-project…
To View & Apply for jobs on this site that accept applications from your location or country, tap the button below to make a Search.
(If this job is in fact in your jurisdiction, then you may be using a Proxy or VPN to access this site, and to progress further, you should change your connectivity to another mobile device or PC).
 
 
 
Search for further Jobs Here:
(Try combinations for better Results! Or enter less keywords for broader Results)
Location
Increase/decrease your Search Radius (miles)
0
200
Filters
Education Level
Experience Level (years)
Posted in last:
Salary