Physical Design Manager

Lead physical design engineering at Astera Labs in Toronto, focusing on complex SoC implementations. Drive ASIC execution while mentoring a talented team within the Signal Connectivity Group.

Astera Labs seeks a Physical Design Engineering Manager with over ten years of relevant experience, including two years in team leadership. Your hands‑on expertise across the physical design flow will guide the team in implementing high-speed connectivity solutions like PCIe and Ethernet retimers. You will foster engineering talent and ensure successful implementation from RTL to GDSII.

• Drive physical design execution from floorplan to tapeout
• Lead a team of physical design engineers in Toronto
• Ensure design convergence across multiple disciplines and vendors
• Establish best practices and quality checks for design flows
• Collaborate with global teams to maintain standards

• Bachelor's in Electrical Engineering;
  Master's preferred
• 10+ years of experience with complex So Cs
• 2+ years of managing engineering teams
• Proficient in Cadence and Synopsys tools
• Solid scripting skills in Tcl, Python, or Perl

Use your expertise in physical design to advance Astera Labs' innovative Signal Connectivity Group.