Senior Analog IC Architect – SerDes Speed I/O
Listed on 2026-10-06
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Engineering
Hardware Engineer, Electronics Engineer, CAD/ AutoCAD/ Mechanical Design -
Design & Architecture
CAD/ AutoCAD/ Mechanical Design
Cadence is seeking an experienced Design Architect Analog IC Designer in Canada to lead analog/mixed-signal block design from concept to verification and contribute to long-reach Ser Des.
The role requires 10+ years in high-speed I/O ICs, strong jitter knowledge, Cadence CAD proficiency, and MS/PhD in EE. The salary range for Canada is 156,800 CAD to 291,200 CAD per year, with potential bonuses and benefits.
This role is for the Senior Analog IC Architect – Ser Des & High-Speed I/O role at Cadence.
The Senior Analog IC Architect – Ser Des & High-Speed I/O role at Cadence is now open for applications in Canada.
Join us at Cadence as our next Senior Analog IC Architect – Ser Des & High-Speed I/O in Canada.
We are currently recruiting a Senior Analog IC Architect – Ser Des & High-Speed I/O for our team in Canada.
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