Senior TPU Co-Design Engineer
Listed on 2026-10-14
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Engineering
Hardware Engineer
Location: Town of Montana
Google seeks a Senior Staff Performance Co-design Engineer on the TPU Chip Architecture team in Sunnyvale, CA. You will shape the hardware/software stack for AI/ML acceleration, focusing on performance modeling, verification, and scalable TPU architectures.
You'll lead cross-functional collaboration across research, software, and hardware groups, drive long-term architectural roadmaps, and help translate ML research into production-grade accelerators powering Google's large-scale AI workloads.
The following position is for a Senior Staff TPU Performance Co-Design Engineer with Google.
We invite applications for the Senior Staff TPU Performance Co-Design Engineer position located in Town of Montana, WI, United States.
The following opening is for a Senior Staff TPU Performance Co-Design Engineer with Google.
Our group is growing, and we are hiring a Senior Staff TPU Performance Co-Design Engineer in Town of Montana, WI, United States.
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