Senior Analog Design Engineer at Synopsys

Elevate your career as a Senior Analog Design Engineer with Synopsys, specializing in high-speed SERDES IP. Lead innovative projects and collaborate with multidisciplinary teams to drive advancements in chip design.

Synopsys is searching for a seasoned engineer with extensive experience in high-speed SERDES IP and advanced CMOS design. You'll tackle complex circuit challenges and mentor junior engineers while developing standards-based transceiver architectures. Your skills in communication and collaboration will be vital in achieving project success and fostering team innovation.

Key Responsibilities:

• Develop SERDES transceiver architectures based on established standards

• Design and verify high-speed analog circuits for performance optimization

• Collaborate with cross-functional teams for design quality

• Present technical findings to customers and industry groups

• Oversee physical layout for reliability and parasitic management

Requirements:

• Ph.D. with 6+ years or M.Sc. with 8+ years in analog IC design

• Expertise in CMOS design and SERDES sub-circuits

• Proficiency in schematic and verification tools

• Experience with Verilog-A, TCL, or Python scripting

• Strong communication and documentation capabilities

Your expertise in analog design will significantly impact the future of high-speed connectivity.
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