FPGA Design Engineer; XILINX, SDR & Jamming Systems; m​/f​/d

Who we are

We are where the future begins
– across the globe, GCS creates safe environments by eliminating explosive threats and restoring habitats. Integrating our own innovative, proven technology with on-the-ground operational expertise, we remove landmines and other explosive remnants of war safely and sustainably. We are an owner-managed, independent company headquartered in Switzerland with engineering and production facilities in Germany and regional offices world-wide.

We are looking for you to join our team in Zürich, Switzerland or Białystok, Poland immediately or upon availability in a 100% capacity.

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
• 5+ years of hands-on experience with XILINX FPGAs and associated tool chains (Vivado, Vitis, ISE)
• Strong experience in VHDL and/or Verilog/System Verilog for FPGA design
• Deep understanding of Digital Signal Processing (DSP) principles and their FPGA implementation
• Experience designing for real-time, high-throughput applications
• Familiarity with FPGA simulation tools (Model Sim, Questa, etc.)
• Experience with version control (e.g., Git) and collaborative development environments
• Ability to independently manage full FPGA development cycle—from specification to deployment
• Excellent verbal and written communication skills in English

The opportunity to play an active and meaningful role in shaping the future of our globally active company and to develop yourself within the company. Flat hierarchies, a pleasant working atmosphere, flexible working hours and workplace regulations as well as attractive compensation is what sets us apart.

• Specify, design, and implement FPGA solutions for SDR and RF jamming applications
• Work with the XILINX FPGA toolchain (Vivado, Vitis, etc.) and target XILINX FPGA platforms
• Integrate existing IP cores and design custom IP cores using VHDL/Verilog or System Verilog
• Develop DSP algorithms suitable for implementation on FPGA architectures
• Collaborate with system architects, hardware engineers, and software teams to define FPGA requirements and interfaces
• Perform simulation, synthesis, place & route, and timing analysis
• Support integration and debugging in laboratory and field environments
• Document design specifications, test plans, and user manuals
• Maintain a high level of quality and reliability in the design process through structured engineering practices

Regional Office
Symlab AG
Technoparkstrasse 1
8005 Zürich
Switzerland

or

Regional Office
Global Clearance Solutions Poland sp. z o.o.
Dąbrowskiego Street 20/4
15-872 Białystok
Poland
gcs.ch

Apply now with your application documents and your availability and become part of our GCS team.