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Lead RTL Design Engineer -Gen IoT Chips

Job in Zürich, 8058, Zurich, Kanton Zürich, Switzerland
Listing for: Sequans Communications Limited
Full Time position
Listed on 2026-05-28
Job specializations:
  • Engineering
    Systems Engineer, Hardware Engineer, Engineering Design & Technologists
Salary/Wage Range or Industry Benchmark: 125000 - 150000 CHF Yearly CHF 125000.00 150000.00 YEAR
Job Description & How to Apply Below
Position: Lead RTL Design Engineer for Next-Gen IoT Chips
Location: Zürich

Sequans Communications Limited is hiring for a position within their VLSI team in Zürich. Responsibilities include specifying, designing, and verifying digital blocks for new chipset generations. Candidates should have a degree in computer science or electrical engineering and at least 5 years of experience in ASIC/FPGA development.

Key skills include proficiency in hardware description languages and experience in optimization techniques. The role demands excellent communication skills and the ability to work in a multicultural environment.

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