Analog IC Design Engineer

Job number: CH035

• Design & Development:
  Participate in the design, simulation, and layout supervision of analog and mixed-signal circuits for advanced CMOS image sensors and related systems.
• Circuit Expertise:
  Contribute to critical circuit blocks including ADCs, amplifiers, bias circuits, timing generators, and power management circuits.
• Cross-Functional Collaboration:
  
  Work closely with pixel, digital, layout, and system teams to ensure seamless integration and achieve performance targets.
• Validation & Debugging:
  Assist with silicon debugging, characterization, and validation of designed circuits in a lab environment.
• Documentation & Reviews:
  Support comprehensive documentation, test plan development, and technical reviews throughout the product development lifecycle.

• Education:
  
  Master’s degree or higher in Electrical Engineering, Microelectronics, or a closely related field.
• Experience:
  
  0-5 years of industry or academic experience in analog/mixed-signal circuit design.
• Strong Foundation:
  Excellent understanding of analog design fundamentals, including noise, matching, stability, and low-power design techniques.
• Tool Proficiency:
  Familiarity with industry-standard design tools (e.g., Cadence Virtuoso, Spectre).
• Bonus Points:
  
  Hands-on experience with image sensor analog blocks or pixel-related circuits is a significant advantage.
• Team Player: A team-oriented, self-motivated individual eager to learn and thrive in a fast-paced startup environment.
• Communication:
  Good verbal and written communication skills in English.

• Impactful Work:
  Opportunity to innovate cutting-edge image sensor technologies within a collaborative international team.
• Full Cycle Exposure:
  Gain experience across the entire IC development cycle, from initial concept to mass production.
• Dynamic Environment:
  Enjoy a flexible working environment with competitive compensation.
• Growth Opportunities:
  Abundant career development and continuous learning opportunities in both technical and system-level domains.

For further information, please contact us at